There are two fundamental ways to envisage light emitting diode chips, i.e., a lateral and a vertical die structure. FIG. 1(a) shows a lateral light emitting diode chip 100 of the prior art. FIG. 1(b) illustrates the lateral light emitting diode chip 100 assembled to a printed circuit board 160. With reference to FIG. 1(a), the lateral light emitting diode chip 100 includes a substrate 102, an n-type GaN layer 104 on the substrate 102, an active layer 106 on the n-type GaN layer 104, a p-type GaN layer 108 on the active layer 106, and contact pads 110 on the n-type GaN layer 104 and the p-type GaN layer 108 respectively. As shown in FIGS. 1(a) and 1(b), when the light emitting diode chip 100 is assembled to the printed circuit board 160, a lead frame 114 connects the contact pads 110 of the light emitting diode chip 100 to contact pads 168 of the printed circuit board 160.
FIG. 2(a) illustrates a vertical light emitting diode chip 200 of the prior art. FIG. 2(b) illustrates the vertical light emitting diode chip 200 assembled to a printed circuit board of the prior art. Similar to the lateral structure, the vertical light emitting diode chip 200 includes a substrate 202, an n-type GaN layer 204 on the substrate 202, an active layer 206 on the n-type GaN layer 204, a p-type GaN layer 208 on the active layer 206, and a contact pad 210 on the p-type GaN layer 208. As shown in FIG. 2(b), a lead frame 214 connects the contact pads (not numbered) of the light emitting diode chip 200 to contact pads 268 of a printed circuit board (not numbered).
As the light emitting diode chips (100, 200) are wiring bonded to the printed circuit boards, the heat generated in the active region may propagate through the substrate (102, 202) before being dissipated into the printed circuit board.